IIT-Delhi Unveils India’s First Indigenous Micro-GPU, Eyes Advanced Multi-Core Graphics Future

Researchers at IIT-Delhi have developed India’s first working and demonstrable indigenously designed micro Graphics Processing Unit (micro-GPU), marking a significant step towards reducing the country’s dependence on imported graphics processors.
GPUs are critical components in modern computing systems and are widely used in artificial intelligence, machine learning, graphics rendering and embedded electronics.
The breakthrough has been achieved by researchers from the Electrical Engineering Department, with the project led by MTech students Nammi Akash and M Ravi Teja under the guidance of Professors Jayadeva and Kaushik Saha.
The team demonstrated programmable graphics rendering using a custom floating-point GPU engine implemented entirely in Register Transfer Language (RTL) and deployed on a Spartan-7 Field Programmable Gate Array (FPGA).
The indigenous micro-GPU architecture is designed to support graphics and display-processing systems for embedded applications.
According to the researchers, the scalable programmable graphics processor can be used in industrial control displays, low-cost human-machine interfaces, e-rickshaw dashboard navigators, inland-water navigation terminals for fishing boats, educational e-book readers and other affordable visualisation platforms.
The architecture can be implemented as a silicon ASIC or deployed on programmable hardware such as FPGAs, providing flexibility for different applications.
Nammi Akash stated that the objective was to create a compact yet genuinely programmable graphics-processing architecture suitable for FPGA implementation and future ASIC realisation.
The researchers believe such indigenous hardware could support affordable digital-access platforms and contribute towards bridging the digital divide.
The team is now exploring the development of an 8-core to 16-core vector-style graphics processor architecture supported by an optimised compiler and graphics software toolchain.
Researchers are also planning an eventual proof-of-concept implementation using a 65nm ASIC process node.
They believe mature semiconductor nodes such as 65nm can enable economically viable and practically useful indigenous graphics silicon for embedded systems.
Professor Kaushik Saha noted that the project provides students with an opportunity to integrate arithmetic hardware, programmable architectures, compilers and embedded systems design within a unified framework.
Beyond its technological significance, the project represents an important milestone in India’s efforts to strengthen domestic semiconductor capabilities and develop indigenous computing technologies, particularly in specialised embedded and low-cost graphics applications.
PTI
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