India’s TEJAS MK-2 fighter is poised to achieve a landmark in indigenous aerospace advancement with the adoption of a three-part computing architecture featuring a dedicated Auxiliary Computer.

This configuration establishes new standards in safety, computational redundancy, and mission autonomy, reflecting the maturity of India’s digital flight control and mission systems development ecosystem.

The three-computer model being implemented by the Aeronautical Development Agency (ADA) integrates the Digital Flight Control Computer (DFCC), Mission Management and Display Computer (MMDC), and the newly introduced Auxiliary Computer (AC). Together, these systems form a digital core that manages all key flight, mission, and data processing operations of the aircraft.

The DFCC forms the foundation of the MK-2’s stability and controllability through a quadruplex fly-by-wire system, ensuring continuous, precise aircraft response under all flight conditions. The MMDC, on the other hand, operates as the mission data hub—processing radar inputs, navigation data, and sensor outputs to display actionable information on the pilot’s multifunction cockpit displays.

At the heart of the MK-2’s innovation lies the Auxiliary Computer MK-2, a completely indigenous processor platform designed with dual roles. Its first role enhances flight safety and reliability—functioning as a failover system capable of assuming the tasks of either the DFCC or MMDC in the event of a malfunction. This capability dramatically increases system fault-tolerance, a critical factor in combat survivability and mission assurance.

The AC’s second role involves computational offloading. It manages data-heavy and non-time-critical functions such as terrain mapping, electronic warfare threat classification, and predictive analytics for fuel optimisation. By executing these background tasks independently, it reduces the load on the primary DFCC and MMDC, allowing them to operate at peak performance for essential control and decision tasks.

Development and integration trials of this architecture are being conducted at ADA’s ‘Ironbird’ facility in Bengaluru. The Ironbird serves as a full-scale, hardware-in-the-loop test environment replicating the TEJAS MK-2’s avionics and control systems. This ground-based simulation allows exhaustive testing of control logic, fault-handling algorithms, and inter-computer communication protocols prior to actual flight testing.

The first prototype of the TEJAS MK-2, developed by HAL under ADA’s engineering authority, is projected for rollout by late 2025 or early 2026. The advanced computing framework is expected to be fully validated before flight trials commence, ensuring seamless operational transition from simulation to live testing.

The Auxiliary Computer is being developed as a common module for both TEJAS MK-2 and the forthcoming Advanced Medium Combat Aircraft (AMCA). This shared platform strategy is aimed at achieving interoperability, reducing lifecycle costs by up to 30%, and ensuring a streamlined upgrade pathway for future combat systems.

The induction of the Auxiliary Computer marks a major breakthrough for India’s Atmanirbhar Bharat drive in aerospace electronics. Beyond enhancing safety and mission flexibility, it symbolises India’s growing independence in high-performance avionics — positioning the nation closer to achieving self-reliance in next-generation combat technologies.

IDN (With Agency Inputs)